Transistor speed and power are significant parameters in the developing nanometer technologies. In attempts to reduce the size of the transistors, source/drain contacts are placed close to gate sidewalls effectively increasing the parasitic capacitance between the gate and source/drain contacts. This increase in parasitic capacitance results in reduced speed and increase in power. Parasitic capacitance between the gate and source/drain contacts is effected by the spacer material used to isolate the gate from the source/drain contacts. To reduce the parasitic capacitance and thereby improve performance, typical spacers such as nitride spacers and oxide spacers have been replaced with air-gap spacers. However, the use of air-gap spacers can easily lead to leakage of gate contact material inside the air-gap spacer during gate contact formation. Leakage of the gate contact material into the air-gap spacer can cause gate to source/drain contact shorts or reliability issues such as gate to source/drain contact breakdown.